The present invention relates to voltage setting for an operation of a flash memory device and, more particularly, to a flash memory device in which a row voltage is set according to a program command and a program method thereof.
In semiconductor memory devices, in particular, flash memory devices that enable electrical erasure and programming, Fowler-Nordheim (F-N) tunneling and hot electron injection methods are employed in order to perform an erase operation for erasing data stored in a memory cell and a program operation for storing data in the memory cell.
In order to program data into a memory cell, a hot electron injection method is used. In a hot electron injection method, electrons of a channel region adjacent to the drain region of the memory cell are injected into a floating gate of the memory cell. A high voltage for program is applied to the control gate of the memory cell. A high voltage for the operation of a flash memory device generally ranges from 15V to 20V. In general, a flash memory device operating at a low power supply voltage includes a voltage supply circuit for generating a high voltage. The voltage supply circuit is included within the same chip as the flash memory device. The voltage supply circuit is generally configured to pump an input row voltage as a high voltage by employing a voltage pumping circuit.
FIG. 1A is a flowchart illustrating a conventional program operation of a program voltage.
Referring to FIG. 1A, a flash memory device receives a program command code (80h) from an input/output (I/O) terminal for a program operation in step S101, and sequentially receives a column address and a row address in steps S103 and S105. The flash memory device then receives data in synchronization with a write enable signal (WE#) in step S107.
The data, input in step S107, is input to a page buffer connected to a memory cell for program in step S109. If an execution command code 10h is input in step S111, the flash memory device begins operating.
In step S113, a row voltage is set up using the row address input in step S105. After a block is selected in step S115, a word line voltage is set up in step S117.
The row address includes a block address and a word line address. Thus, a program voltage, which will be set in a word line to be programmed, is set up using the row address, and an operation for setting up a pass voltage is performed on the remaining word lines.
If voltage setup for program is completed, the program operation is performed in step S119. If the program is completed, the word line and the row voltage are discharged in step S121.
A timing diagram according to the above operation is illustrated in FIG. 1B.
FIG. 1B is a timing diagram according to the operation of FIG. 1A.
Referring to FIG. 1B, when the flash memory device performs the program operation, it receives the program command code (80h), the column address, and the row address through I/O in steps S101 to S105 and then receives data in synchronization with the write enable signal (WE#). After all of the data is input, a program is performed after a time (tWB) for voltage setup.
Accordingly, a program time is lengthened as long as the voltage setup time is performed after the data is input.